1. Field of the Invention
The present invention relates to an electronic device with a communications function to transmit data by a transmitting means to an audio visual device in a domestic data communications network system.
2. Description of the Prior Art
A Domestic Digital Bus (IEC 84 (Secretariat) 86I,II; Draft-Domestic Digital Bus (D2B)) has been known to communicate data between audio visual devices (referred to as AV devices hereinafter) connected to a common signal transmission path. The AV device provided with such communications means as above has generally worked in the systematic structure illustrated in FIG. 10 through connection via a bus line.
More specifically, for transmitting data between an electronic device (1) 101 and an electronic device (2) 102 in the structure of FIG. 10, conventionally, a frame which is formed in the structure shown in FIG. 11 is used and the data are stored in a data field (DF) 123 of the frame from a master transmitter side to a slave receiver side. In other words, two kinds of transmitting procedures as shown in FIGS. 13a and 13b are conducted, i.e., a procedure A for reading data and a procedure B for writing data.
The structure of the frame shown in FIG. 11 is common to the embodiment of the present invention.
In the procedure A, the master (electronic device (1)) 101, with specifying a preliminarily determined read address, reads out a part of the content stored in a memory unit of the slave (electronic device (2)) 102. In this case, the master transmits a memory address designating frame 135 shown in FIGS. 13a and 13b, then a read data requiring frame 136 and a read slave status frame 137 to the slave 136. In the memory address designating frame 135, a preliminarily defined 12-bit address of the master (electronic device (1)) 101 is stored in a master address 115 in FIG. 11, a preliminarily-defined 12-bit address of the slave (electronic device (2)) 102 is stored in a slave address 116, a code (b3b2b1b0=`1000`B) indicating a write memory address with lock (WMA+L) shown in FIG. 12 into a control bit 117, and a memory read address preliminarily defined 1:1 corresponding to the content of the memory unit which the master (electronic device (1)) 101 desires to read out from the slave (electronic device (2)) 102 into a data bit 118. On the other hand, in the read data requiring frame 136, the same values as in the memory address designating frame 135 are stored in the master address 115 and slave address 116, a code (b3b2b1b0=`0011`B) indicating a read data with lock (RD+L) is stored in the control bit 117, and the content in a memory area which is rendered corresponding by the memory read address in the memory unit of the slave (electronic device (20) 102 is stored in the data bit 118. Furthermore, in the read slave status frame 137, the same values as in the memory address designating frame 135 are stored in the master address 115 and slave address 116, a code (b3b2b1b0=`0110`B) indicating a read slave status with unlock (RSS+UL) is stored in the control bit 117, and the content of the slave status of the slave (electronic device (2)) 102 is stored in the data bit 118. The data bit 118 of the memory address designating frame 135 is transferred in a direction of the write action (MS)131 of FIG. 11, while the data bit 118 of the read data requiring frame 136 is transferred in a direction of the read action (SM)132 shown in FIG. 11. Likewise, the data bit 118 of the read slave status frame 137 is transferred in the (SM)132 direction. The read slave status frame 137 is used so as to release an indication of the master that the slave should be locked.
Meanwhile, in the procedure B, the master (electronic device (1)) 101 simply transfers the data to the slave (electronic device (2)) 102 through consecutive transmission of one or a plurality of write data transferring frames 138 and one write data transferring frame 139 of FIG. 13b. In this case, a preliminarily defined 12-bit address of the master (electronic device (1)) 101 is stored in the master address 115 of each of the write data transferring frames 138 and write data transferring frame 139, and a preliminarily defined 12-bit address of the slave (electronic device (2)) 102 is stored in the slave address 116 of each frame. A code (b3b2b1b0=`1011`B) representing a write data with lock (WD+L) as indicated in a table of FIG. 12 is stored in the control bit 117 of the write data transferring frame 138. Moreover, a code (b3b2b1b0=`1111`B) indicating a write data with unlock (WD+UL) is written and stored in the write data transferring frame 139.
Transmission of data has been carried out in the foregoing manner heretofore.
However, the above-described conventional method for transmission of data in the electronic devices with a data transmission function is found disadvantageous in the following points.
(a) The data is transmitted between a master electronic device and a slave electronic device using two procedures for respective different purposes. In other words, a transmitting procedure when the master reads out the content stored in the memory unit of the slave as data is different from the procedure when the master writes the content stored in the memory unit thereof into a memory unit of the slave. Therefore, no unity is found in the data transmission function, requiring complicated processes in actual communications.
(b) The structure of a communications means within the electronic device realizing both transmission of data and transmission of commands is not clear, and moreover, the role of the communications means in the data transmitting function is not clearly defined. Furthermore, the format, definition and role of the memory address designating frame are not identified between writing and reading processes, whereby the structure of the communications means, in terms of both hardware and software, results in tedious inconsistency.